Physical Design Manager
JOB DESCRIPTION
Lead and manage the physical design team to deliver high-quality semiconductor designs.
Develop and implement physical design strategies and methodologies to ensure optimal performance, power, and area.
Collaborate with cross-functional teams, including architecture, RTL design, and verification, to drive the design from concept to tape-out.
Design and implement advanced physical layouts for integrated circuits using industry-standard EDA tools.
Perform floor planning, power planning, placement, routing, and physical verification of designs to meet performance, power, and area (PPA) targets.
Conduct timing closure and signal integrity analysis to ensure the robustness and reliability of designs.
Collaborate with RTL designers, verification engineers, and technology teams to optimize design methodologies and achieve project goals.
Develop and maintain design methodologies, scripts, and automation flows to improve design productivity and efficiency.
Participate in design reviews, debugging activities, and problem-solving to address design issues and meet project timelines.
JOB REQUIREMENT
Bachelor's/Master's/Ph.D. degree in Electrical Engineering, Computer Engineering, or related field.
Minimum of 10 years of experience in physical design, with at least 2 years in a leadership or management role.
Strong understanding of methodologies, and EDA tools; capable of TOP design handling
Proficiency in industry-standard CAD tools such as Cadence, Synopsys, or Mentor Graphics for physical design.
Experience with scripting languages (e.g., Tcl, Python, Perl) for automation and design flow development.
Solid knowledge of ASIC design flow, semiconductor process technology, and low-power design techniques.
Excellent problem-solving skills, analytical thinking, and attention to detail.
Effective communication and collaboration skills to work in a cross-functional team environment.
Ability to work independently, prioritize tasks, and thrive in a fast-paced, deadline-driven environment.
Preferred Qualifications:
Familiarity with advanced design techniques such as hierarchical design, clock tree synthesis, and power optimization.
Understanding of DFT (Design-for-Test) concepts and methodologies.
Publications, patents, or contributions to industry forums demonstrating technical expertise in VLSI design.
Encouraging team members to be motivated with good coaching skills to accomplish their work.
Good at 1: 1 communication with team members knowing what their personal interests are and what are their concerns to build up good relationships.
Facilitating collaboration within and across teams to root-cause and debug issues
Good decision-making skills and respecting team members' opinions.
Good communication skills to collaborate with HW/SW development teams in HQ.
WHAT'S ON OFFER
Competitive salary and benefits package
Opportunity for growth and advancement within the company
Chance to work on innovative projects and make a meaningful impact in the automotive industry.
Collaborative and supportive company culture.
CONTACT
PEGASI – IT Recruitment Consultancy | Email: recruit@pegasi.com.vn | Tel: +84 28 3622 8666
We are PEGASI – IT Recruitment Consultancy in Vietnam. If you are looking for new opportunity for your career path, kindly visit our website www.pegasi.com.vn for your reference. Thank you!
Job Summary
Company Type:
Semiconductors
Technical Skills:
Hardware, DFT
Location:
Ho Chi Minh - Viet Nam
Salary:
Negotiation
Job ID:
J01521
Status:
Close