Senior Golang Engineer

JOB DESCRIPTION

Design database taking into account of functional and non-functional requirements
Write readable and testable code within limited time
Improve a product by continuous refactoring
Share technical knowledge not only internally but also externally
Educate junior members

JOB REQUIREMENT

Must-have:
5+ years for Web development (3+ years for Golang programming)
Experience to operate an application on a production environment
Experience with Agile
Mindset to achieve product goal
Experience to collaborate with several teams
Experience to work on E2E testing
Experience with system design at intermediate level
Nice-to-have
Experience to develop toB applications
English skill (professional working proficiency)

WHAT'S ON OFFER

Caring Mental & Physical Recreation:
Hybrid working: 2 days at the office and 3 days WFH
Working hour: Flexible start 8AM-9AM from Mon-Fri
Full salary in probation
Insurance: Applied from Probation period: Social Insurance, Health Insurance, Unemployment Insurance (on 100% salary)
Private health insurance & accident insurance. From Managing level: extra for family members
Bonus: 13th month salary
16 - 24 paid days off and more
Paternity leave: Extra 5 days
Annual company trip; Quarterly team building
Billiards & Running club
Annual health check
Well-equipped facility: Macbook pro, additional monitor, ..
Caring Career & Development:
Clear Career path
Foreign language & International technology-related certifications sponsoring
External & internal training courses
Soft-skill workshops
Tech seminars
Monthly and biannual Recognition Awards
Performance & salary review: twice/year (Jun & Dec)

CONTACT

PEGASI – IT Recruitment Consultancy | Email: recruit@pegasi.com.vn | Tel: +84 28 3622 8666
We are PEGASI – IT Recruitment Consultancy in Vietnam. If you are looking for new opportunity for your career path, kindly visit our website www.pegasi.com.vn for your reference. Thank you!

Job Summary

Company Type:

Product, Fintech

Technical Skills:

Golang

Location:

Ha Noi - Viet Nam

Working Policy:

Salary:

Negotiation

Job ID:

J01578

Status:

Close

Related Job:

Senior Staff Engineer

Ho Chi Minh - Viet Nam

Product

  • NestJS
  • Angular
  • Typescript

Revamp and streamline key components throughout the Angular 20 + NestJS codebase. Recognize and integrate architectural enhancements such as modularization, domain distinction, and shared service boundaries. Work closely with the CTO to refine product architecture without disrupting release schedule. Guarantee system efficiency, data integrity, and sustainability through improved design. Analyze crucial code pathways and mentor others in cutting-edge Angular and TypeScript methodologies. Introduce practices that elevate testability, deployment security, and developer productivity. Engage in product design conversations to synchronize engineering endeavors with actual user requirements.

Negotiation

View details

Senior Design Verification Engineer

Ho Chi Minh - Viet Nam

Semiconductor

  • Chip Verification

IP/SOC Design Verification: Perform verification of IP and SoC-level designs to ensure functional correctness and performance. Specification Review: Analyze IP/SOC specifications and architectural documentation to extract key features and define verification requirements. Verification Planning: Develop comprehensive verification plans based on design features and project goals. Testbench Development: Build and maintain reusable, scalable testbenches for simulation and validation. Simulation & Debugging: Execute RTL and gate-level simulations, perform failure analysis, and drive coverage analysis and closure. Methodology & Flow: Contribute to the implementation and continuous improvement of design verification methodologies, tools, and workflows.

Negotiation

View details

Senior RTL Design Engineer

Ho Chi Minh - Viet Nam

Semiconductor

  • Chip RTL Design
  • RTL

Designing IP/SOC blocks and integrating them into the full chip Creating architecture and design for clock, power, and reset systems Designing high-speed interface subsystems, such as PCle, UCle, and Ethernet Developing legacy interface IP subsystems, including UART, SPI, I2C, CPU, DMA, APB, and AXI Conducting sanity checks using simulation, LINT, CDC, RDC, and DFT Providing support for physical implementation, including SDC, synthesis, GCA, STA, and formality

Negotiation

View details