Senior QA Engineer
JOB DESCRIPTION
JOB REQUIREMENT
WHAT'S ON OFFER
CONTACT
Job Summary
Company Type:
Product, Blockchain
Technical Skills:
Automation Test, Manual Test
Location:
Ho Chi Minh, Ha Noi, Da Nang, Others - Viet Nam
Working Policy:
Salary:
Negotiation
Job ID:
J00744
Status:
Close
Related Job:
Senior Deep Learning Algorithms Engineer
Ho Chi Minh, Ha Noi - Viet Nam
Product
- Machine Learning
- Algorithm
Analyze and optimize deep learning training and inference workloads on advanced hardware and software platforms. Work with researchers and engineers to enhance workload performance. Develop high-quality software for deep learning platforms. Create automated tools for workload analysis and optimization.
Negotiation
View detailsSoftware Engineer
Ho Chi Minh - Viet Nam
Product
Create and develop the API Platform with a focus on reliability, performance, and providing a top-tier developer experience Deploy and enhance AI/ML models in scalable, production environments in collaboration with research and applied ML teams Manage and advance a contemporary, cloud-native infrastructure stack utilizing Kubernetes, Docker, and infrastructure-as-code (IaC) tools Ensure platform dependability by designing and implementing telemetry, monitoring, alerting, autoscaling, failover, and disaster recovery mechanisms Contribute to developer and operations workflows, encompassing CI/CD pipelines, release management, and on-call rotations Work collaboratively across teams to implement secure APIs with fine-grained access control, usage metering, and billing integration Continuously enhance platform performance, cost-efficiency, and observability to accommodate scaling and serve users globally.
Negotiation
View detailsPhysical Design Engineer (STA Focus)
Hai Phong - Viet Nam
Outsource
Conducting Static Timing Analysis (STA), validation, and debugging under various PVT conditions using Tempus. Implementing DMMMC flow for STA and logical/physical aware ECO flows with a focus on timing and leakage optimization. Overseeing STA setup, convergence, reviews, and final approval for multi-mode (func/scan/atspeed) and multi-voltage domain designs. Evaluating unconstrained endpoints and examining timing reports. Working closely with design, synthesis, and PnR teams to ensure efficient timing closure.