Senior - Manager QA/QC Test Engineer/Designer (Japanese N2+)
ABOUT CLIENT
JOB DESCRIPTION
JOB REQUIREMENT
WHAT'S ON OFFER
CONTACT
Job Summary
Company Type:
Product
Technical Skills:
Manual Test
Location:
Ho Chi Minh, Ha Noi - Viet Nam
Working Policy:
Hybrid
Job ID:
J01759
Status:
Close
Related Job:
Senior DFT Engineer
Ho Chi Minh - Viet Nam
Product
- Chip DFT
We are looking for a highly motivated Senior DFT Engineer to join our advanced ASIC design team. In this position, you will take the lead in defining and implementing comprehensive Design-for-Test (DFT) strategies for complex SoCs and IPs. Collaboration with Front-end, Backend, and Product Engineering teams will be essential to ensure high test coverage, optimal yield, and cost-effective manufacturing solutions.**Key Responsibilities** **DFT Strategy & Architecture:** Define DFT specifications and finalize comprehensive strategies (including MBIST, SCAN, BSCAN, IP-Test, In-system test, and Low-Power DFT) to meet rigorous testing targets and quality goals. **Implementation & Verification:** Lead the implementation and verification of DFT circuits, ensuring robustness across various design scenarios. **Timing Closure:** Define DFT-specific SDC (Synopsys Design Constraints) and work closely with Backend Engineers to validate timing constraints and achieve timing closure in test modes. **Pattern Generation & Silicon Debug:** Generate tester patterns using industry-standard tools; perform silicon bring-up, debug analysis, and failure diagnosis to resolve yield issues. **Optimization:** Analyze test coverage metrics and drive initiatives to improve coverage while reducing test costs, pin counts, and test time. **Project Leadership:** Act as a Project Leader or Block Coordinator to manage project schedules, mitigate risks, and ensure on-time tape-out (T/O).
Negotiation
View detailsSenior Physical Design Engineer
Ho Chi Minh - Viet Nam
Product
- Chip Physical Design
We are looking for a skilled and experienced Physical Design Engineer to join our team and contribute to the development of next-generation ASICs. The role involves overseeing the physical implementation of complex designs, ensuring compliance with performance, power, and area targets while following stringent design rules and verification processes. # Responsibilities: Execute ASIC physical implementation utilizing automated place and route tools Conduct floor planning, power plan synthesis, clock tree synthesis, timing closure, routing, and post-route optimization Oversee physical verification signoff including DRC, LVS, ERC, antenna, and ESD Facilitate communication and coordination across different internal support teams
Negotiation
View detailsSenior Fullstack .NET Engineer
Ho Chi Minh
Outsource
- .NET
- Frontend
- Azure
Collaborate with cross-functional teams (Developers, Product Owners, QA) to design and deliver scalable full-stack solutions using various technologies. Develop high-quality, maintainable code for both backend services and client-side applications. Translate business and stakeholder requirements into efficient, reliable technical solutions. Contribute to system architecture, technical direction, and continuous improvement of engineering practices. Advocate for software quality through code reviews, testing, and adherence to best practices. Solve complex technical problems and proactively drive solutions to completion. Actively participate in Agile/Scrum processes and promote a collaborative, transparent team culture. Continuously learn, innovate, and contribute ideas to enhance product and team performance.